The 41st IEEE VLSI Test Symposium

Ieee Vlsi Test Symposium

High-Level Test Generation using Physically-Induced Faults - VLSI Test Symposium, 1995. Proceedings., 13th IEEE

A high-level fault modeling and testing philosophy is proposed which is aimed at ensuring,full detection of lowlevel, physical faults, as well as the industry-standard single stuck-line (SSL) faults. A set of independent functional faults and the corresponding ,functional tests are derived (induced) from the circuit under test; ofparticulur interest are SSL-induced functional faults or SIFs. We...

Transformed Pseudo-Random Patterns for BIST - VLSI Test Symposium, 1995. Proceedings., 13th IEEE

This paper presents a new approach for on-chip test pattern generation. The set of test patterns generated by a pseudo-random pattern generator (e.g., an LFSR) is transformed into a new set of patterns that provides the desired fault coverage. The trang5ormation is performed by a small amount of mapping logic that decodes sets of patterns that don't detect any new faults and maps them into patt...

Testing Embedded Cores Using Partial Isolation Rings - VLSI Test Symposium, 1997., 15th IEEE

Intellectual property cores pose a signifcant test challenge. The core supplier may not give any information about the internal logic of the core, but simply provide a set of test vectors for the core which guarantees a particular fault coverage. If the core is embedded within a larger design, then the problem is how to apply the specified test vectors to the core and how to test the userdefine...

IEEE VLSI Test Symposium 1997, pp. 188-195 Fast Algorithms For Static Compaction of Sequential Circuit Test Vectors

Two fast algorithms for static test sequence compaction are proposed for sequential circuits. The algorithms are based on the observation that test sequences traverse through a small set of states, and some states are frequently re-visited throughout the application of a test set. Subsequences that start and end on the same states may be removed if necessary and su cient conditions are met for ...